This book presents current methods for dealing with software reliability, illustrating the advantages and disadvantages of each method. The description of the techniques is intended for a non-expert audience with some minimal technical background. It also describes some advanced techniques, aimed at researchers and practitioners in software engineering. This reference will serve as an introduction to formal methods and techniques and will be a source for learning about various ways to enhance software reliability. Various projects and exercises give readers hands-on experience with the various formal methods and tools.
An expanded and updated edition of a comprehensive presentation of the theory and practice of model checking, a technology that automates the analysis of complex systems. Model checking is a verification technology that provides an algorithmic means of determining whether an abstract model—representing, for example, a hardware or software design—satisfies a formal specification expressed as a temporal logic formula. If the specification is not satisfied, the method identifies a counterexample execution that shows the source of the problem. Today, many major hardware and software companies use model checking in practice, for verification of VLSI circuits, communication protocols, software...
The book constitutes the refereed proceedings of the 9th International Conference on Verification, Model Checking, and Abstract Interpretation, VMCAI 2007, held in San Francisco, USA, in January 2008. The 21 revised full papers presented together with 2 invited lectures and 2 invited tutorials were carefully reviewed and selected from a total of over 60 submissions. The papers feature current research from the communities of verification, program certification, model checking, debugging techniques, abstract interpretation, abstract domains, static analysis, cross-fertilization, and advancement of hybrid methods.
Abstract: "The representation of partial order semantics as an equivalence relation on interleaving sequences extends the expressive power of interleaving semantics. A specification formalism called existential specification is introduced: a formula is interpreted over equivalence classes of sequences by asserting that some (at least one but not necessarily all) sequences from each equivalence class satisfy a given property. It differs from the more common universal specification, which is interpreted over all sequences in all classes. Its advantage over other formalisms that deal with partial order executions lies in its simplicity: any syntax that is defined over interleaving sequences, e.g., linear temporal logic, can be adopted.
This book constitutes the refereed proceedings of the 22nd IFIP WG 6.1 International Conference on Formal Techniques for Networked and Distributed Systems, FORTE 2002, held in Houston, Texas, USA in November 2002. The 22 revised full papers, 2 tool papers, and 2 posters presented were carefully reviewed and selected from 61 submissions. All current aspects of formal method for distributed systems and communication protocols are addressed, in particular formal specification, testing, and verification of such systems.
This book presents surveys on the theory and practice of modelling, specifying, and validating concurrent systems. It contains surveys of techniques used in tools developed for automatic validation of systems. Other papers present recent developments in concurrency theory, logics of programmes, model-checking, automata, and formal languages theory. The volume contains the proceedings from the workshop, Partial Order Methods in Verification, which was held in Princeton, NJ, in July 1996. The workshop focused on both the practical and the theoretical aspects of using partial order models, including automata and formal languages, category theory, concurrency theory, logic, process algebra, programme semantics, specification and verification, topology, and trace theory. The book also includes a lively e-mail debate that took place about the importance of the partial order dichotomy in modelling concurrency.
This book constitutes the refereed proceedings of the 11th International Conference on Computer Aided Verification, CAV'99, held in Trento, Italy in July 1999 as part of FLoC'99. The 34 revised full papers presented were carefully reviewed and selected from a total of 107 submissions. Also included are six invited contributions and five tool presentations. The book is organized in topical sections on processor verification, protocol verification and testing, infinite state spaces, theory of verification, linear temporal logic, modeling of systems, symbolic model checking, theorem proving, automata-theoretic methods, and abstraction.
This volume of Lecture Notes in Computer Science contains the revised versions of the papers presented at the 9th International Conference on Implemen- tion and Application of Automata, CIAA 2004. Also included are the extended abstracts of the posters accepted to the conference. The conference was held at Queen’s University in Kingston, Ontario, Canada on July 22–24, 2004. As for its predecessors, the theme of CIAA 2004 was the implementation of automata and grammars of all types and their application in other ?elds. The topics of the papers presented at the conference range from applications of automata in natural language and speech processing to protein sequencingandgenecompression,a...
This book is a collection of the papers presented at the 32nd Communicating Process Architecture conference (CPA), held at the Technical University Eindhoven, the Netherlands, from the 1st to the 4th of November 2009. Concurrency is a fundamental mechanism of the universe, existing in all structures and at all levels of granularity. To be useful in this universe, any computer system has to model and reflect an appropriate level of abstraction. For simplicity, therefore, the system needs to be concurrent - so that this modeling is obvious and correct. Today, the commercial reality of multicore processors means that concurrency issues can no longer be ducked if applications are going to be abl...
What is Spin? Spin is a general tool for the specification and formal verification of software for distributed systems. It has been used to detect design errors in a wide range of applications, such as abstract distributed algorithms, data communications protocols, operating systems code, and telephone switching code. The verifier can check for basic correctness properties, such as absence of deadlock and race conditions, logical completeness, or unwarranted assumptions about the relative speeds of correctness properties expressed in the syntax of Linear-time Temporal Logic (LTL). The tool translates LTL formulae automatically into automata representations, which can be used in an efficient on-the-fly verifications procedure. This DIMACS volume presents the papers contributed to the second international workshop that was held on the Spin verification system at Rutgers University in August 1996. The work covers theoretical and foundational studies of formal verification, empirical studies of the effectiveness of different types of algorithms, significant practical applications of the Spin verifier, and discussions of extensions and revisions of the basic code.